1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, it relates to a semiconductor device having a plurality of types of transistors and a method of manufacturing the same.
2. Description of the Background Art
In recent years, refinement and multi-functionalization of a semiconductor device progress to develop a semiconductor device comprising a plurality of circuit parts having different functions and having a plurality of types of transistors.
For example, a system LSI comprises a mass-storage memory cell part, a logic part operating at a high speed, a peripheral circuit part and the like. In the system LSI, transistors forming the respective circuit parts are different in required performance from each other, leading to the necessity of arranging a plurality of types of transistors.
While a plurality of types of masks must be prepared in order to form the transistors, the number of the types of the required masks is increased in proportion to the number of the types of the transistors, to disadvantageously complicate manufacturing steps and increase the manufacturing cost.
A semiconductor device according to a first aspect of the present invention at least comprises a first impurity region of a first impurity concentration having a first pattern formed in a target layer, a second impurity region having a second pattern symmetrical with the first pattern formed in the target layer with a second impurity concentration and a symmetrical third impurity region having a third impurity concentration corresponding to the total of the first and second impurity concentrations formed in the target layer.
In the semiconductor device according to the first aspect, three types of impurity regions can be obtained through two impurity introduction steps by forming the third impurity region in steps of forming the first and second impurity regions, for example, whereby the semiconductor device can be obtained through simplified manufacturing steps.
According to a second aspect of the present invention, the first and second patterns are rotation-symmetrical.
In the semiconductor device according to the second aspect, the first and second impurity regions are so rotation-symmetrically arranged that the first impurity region can be formed by introducing an impurity through an exposure mask for implantation having a pattern corresponding to the first impurity region and the second impurity region can be formed by thereafter rotating the exposure mask for implantation, for example, whereby the number of types of exposure mask for implantations can be reduced for manufacturing the semiconductor device at a low cost.
According to a third aspect of the present invention, the first and second patterns are line-symmetrical.
In the semiconductor device according to the third aspect, the first and second impurity regions are so line-symmetrically arranged that the first impurity region can be formed by introducing an impurity through an exposure mask for implantation having a pattern corresponding to the first impurity region and the second impurity region can be formed by thereafter turning over the exposure mask for implantation, for example, whereby the number of types of exposure mask for implantations can be reduced for manufacturing the semiconductor device at a low cost.
According to a fourth aspect of the present invention, the first and second impurity concentrations are different from each other.
In the semiconductor device according to the fourth aspect, circuits having different functions can be formed on the basis of the first and second impurity regions by rendering the first and second impurity concentrations different from each other.
According to a fifth aspect of the present invention, the first and second impurity concentrations are identical to each other.
In the semiconductor device according to the fifth aspect, first and second impurity regions symmetrical also in concentration can be obtained by rendering the first and second impurity concentrations identical to each other and a plurality of semiconductor devices identical in structure to each other can be obtained by dividing the first and second impurity regions to include the third impurity region respectively. Thus, the manufacturing cost for the semiconductor device can be reduced.
An exposure mask for implantation according to a sixth aspect of the present invention is employed for manufacturing the semiconductor device according to the first aspect and used in a first or second arrangement state to satisfy the symmetry between the first and second patterns for forming a pattern for implanting an impurity into the target layer corresponding to the first impurity region and the third impurity region when used in the first arrangement state and implanting an impurity into the target layer in regions corresponding to the second impurity region and the third impurity region when used in the second arrangement state.
In the exposure mask for implantation according to the sixth aspect, the third impurity region can be formed in steps of forming the first and second impurity regions.
A semiconductor device according to a seventh aspect of the present invention at least comprises a plurality of first impurity regions of a first impurity concentration having predetermined patterns formed in a target layer and a symmetrical second impurity region having a second impurity concentration integral times the first impurity concentration formed in the target layer, and the respective predetermined patterns of the plurality of first impurity regions are formed in symmetry.
In the semiconductor device according to the seventh aspect, the second impurity region having a concentration obtained by multiplying the first impurity concentration by the number of the first impurity regions can be obtained as the maximum concentration region, and a plurality of types of impurity regions having different concentrations ranging from the first impurity concentration to the aforementioned maximum concentration can be formed with a single type of exposure mask for implantation depending on the pattern formed on the exposure mask for implantation.
According to an eighth aspect of the present invention, each of the predetermined patterns of the plurality of first impurity regions is rotation-symmetrical.
In the semiconductor device according to the eighth aspect, the plurality of first impurity regions are so rotation-symmetrically arranged that the initial first impurity region can be formed by introducing an impurity through an exposure mask for implantation having a pattern corresponding to the first impurity regions and the second first impurity region can be formed by thereafter rotating the exposure mask for implantation, for example, whereby the number of types of exposure mask for implantations can be reduced and the manufacturing cost for the semiconductor device can also be reduced.
According to a ninth aspect of the present invention, each of the predetermined patterns of the first impurity regions is line-symmetrical.
In the semiconductor device according to the ninth aspect, the plurality of first impurity regions are so line-symmetrically arranged that the initial first impurity region can be formed by introducing an impurity through an exposure mask for implantation having a pattern corresponding to the first impurity regions and the second first impurity region can be formed by thereafter turning over the exposure mask for implantation, for example, whereby the number of types of exposure mask for implantations can be reduced and the manufacturing cost for the semiconductor device can also be reduced.
A method of manufacturing a semiconductor device according to a tenth aspect of the present invention comprises a step of (a) forming an implantation pattern at least having a first impurity region of a first impurity concentration having a first pattern formed in a target layer, a second impurity region having a second impurity concentration formed in the target layer with a second pattern symmetrical with the first pattern and a symmetrical third impurity region having a third impurity concentration corresponding to the total of the first and second impurity concentrations formed in the target layer, and the step (a) includes steps of (a-1) preparing an exposure mask for implantation used in a first or second arrangement state to satisfy the symmetry between the first and second patterns for transferring a pattern for implanting an impurity into the target layer corresponding to the first impurity region and the third impurity region when used in the first arrangement state and for implanting an impurity into the target layer in regions corresponding to the second impurity region and the third impurity region when used in the second arrangement state, (a-2) using the exposure mask for implantation in the first arrangement state for ion-implanting the impurity into the target layer in regions corresponding to the first impurity region and the third impurity region to be in the first impurity concentration, and (a-3) using the exposure mask for implantation in the second arrangement state for ion-implanting the impurity into the target layer in the region corresponding to the second impurity region to be in the second impurity concentration while increasing the impurity concentration of the target layer in the region corresponding to the third impurity region for forming the third impurity region.
In the method of manufacturing a semiconductor device according to the tenth aspect, the first to third impurity regions can be formed by using a single type of exposure mask for implantation in various arrangement states, whereby the number of exposure mask for implantations required for manufacturing the semiconductor device can be reduced for reducing the manufacturing cost.
According to an eleventh aspect of the present invention, the second arrangement state of the exposure mask for implantation is rotated by 180xc2x0 with respect to the first arrangement state, and the first and second impurity regions are rotation-symmetrically-arranged through the steps (a-2) and (a-3).
In the method of manufacturing a semiconductor device according to the eleventh aspect, the second impurity region is formed by rotating the exposure mask for implantation after forming the first impurity region, whereby the number of types of exposure mask for implantations can be reduced for reducing the manufacturing cost.
According to a twelfth aspect of the present invention, the second arrangement state of the exposure mask for implantation is obtained by turning over the exposure mask for implantation with respect to the first arrangement state, and the first and second impurity regions are line-symmetrically arranged through the steps (a-2) and (a-3).
In the method of manufacturing a semiconductor device according to the twelfth aspect, the second impurity region is formed by turning over the exposure mask for implantation after forming the first impurity region, whereby the number of types of exposure mask for implantations can be reduced for reducing the manufacturing cost.
According to a thirteenth aspect of the present invention, the method of manufacturing a semiconductor device according to the tenth aspect further comprises a step of (b) dividing the implantation pattern by dicing after the step (a).
In the method of manufacturing a semiconductor device according to the thirteenth aspect, a semiconductor device having an asymmetrical implantation pattern can be obtained by dividing the symmetrical implantation pattern by dicing.
According to a fourteenth aspect of the present invention, the step (b) includes a step of setting a dicing line at least on the third impurity region.
In the method of manufacturing a semiconductor device according to the fourteenth aspect, the symmetrical implantation pattern can be divided into asymmetrical implantation patterns partially including the third impurity region having a relatively high concentration on an arbitrary position by setting the dicing line on the third impurity region.
According to a fifteenth aspect of the present invention, an alignment mask for aligning the exposure mask for implantation is arranged on the target layer, and the exposure mask for implantation has first and second alignment marks to be superposed with the alignment mask in the first and second arrangement states respectively.
In the method of manufacturing a semiconductor device according to the fifteenth aspect, the exposure mask for implantation has the first and second alignment marks to be superposed with the alignment mark in the first and second arrangement states respectively, whereby misalignment of the mask position can be prevented also when varying the arrangement state of the exposure mask for implantation.
According to a sixteenth aspect of the present invention, the first and second alignment marks include marks indicating whether the exposure mask for implantation is used in the first arrangement state or in the second arrangement state.
In the method of manufacturing a semiconductor device according to the sixteenth aspect, it follows that the alignment marks include arrangement information, whereby it is possible to recognize whether the exposure mask for implantation is used in the first arrangement state or in the second arrangement state.
A method of manufacturing a semiconductor device according to a seventeenth aspect of the present invention comprises a step of (a) forming an implantation pattern at least comprising a plurality of first impurity regions of a first impurity concentration having predetermined patterns formed in a target layer and a symmetrical second impurity region having a second impurity concentration integral times the first impurity concentration formed in the target layer with the predetermined patterns of the plurality of first impurity regions formed in symmetry, and the step (a) includes steps of (a-1) preparing an exposure mask for implantation used in an arrangement state varied along a rule satisfying the symmetry of the respective predetermined patterns thereby transferring a pattern for successively implanting an impurity into the target layer corresponding to the plurality of first impurity regions and repetitively implanting an impurity into the target layer corresponding to the second impurity region, and (a-2) successively ion-implanting the impurity into the target layer in regions corresponding to the plurality of first impurity regions to be in the first impurity concentration and increasing the impurity concentration of the target layer corresponding to the second impurity region thereby forming the second impurity region, while varying the arrangement state of the exposure mask for implantation along the rule.
In the method of manufacturing a semiconductor device according to the seventeenth aspect, impurity implantation into the second impurity region is repeated every time the arrangement state of the exposure mask for implantation is varied along the prescribed rule for forming each first impurity region, whereby the second impurity region having a concentration obtained by multiplying the first impurity concentration by the number of the first impurity regions can be obtained as the maximum concentration region, and a plurality of types of impurity regions having different concentrations ranging from the first impurity concentration to the aforementioned maximum concentration can be formed with a single type of exposure mask for implantation depending on the pattern formed on the exposure mask for implantation. Thus, the number of types of exposure mask for implantations can be reduced for reducing the manufacturing cost.
According to an eighteenth aspect of the present invention, the rule is a rule of varying the arrangement state by rotating the exposure mask for implantation by predetermined angles, and the plurality of first impurity regions are rotation symmetrically arranged respectively through the step (a-2).
In the method of manufacturing a semiconductor device according to the eighteenth aspect, the exposure mask for implantation is rotated by a prescribed angle for forming the first impurity regions, whereby the first impurity regions can be formed in a number obtained by dividing 360xc2x0 by the angle of rotation and the concentration of the second impurity region can be increased by the number of the first impurity regions.
According to a nineteenth aspect of the present invention, the rule is a rule of turning over the exposure mask for implantation in different directions by a prescribed number of times, and the plurality of first impurity regions are line-symmetrically arranged respectively through the step (a-2).
In the method of manufacturing a semiconductor device according to the nineteenth aspect, the exposure mask for implantation is turned over in different directions by a prescribed number of times for forming the first impurity regions, whereby a single type of exposure mask for implantation can be used at least for four implantation steps.
According to a twentieth aspect of the present invention, an alignment mark for aligning the exposure mask for implantation is arranged on the target layer, and the exposure mask for implantation has a plurality of alignment marks to be superposed with the alignment mark following variation of the arrangement state respectively.
In the method of manufacturing a semiconductor device according to the twentieth aspect, the exposure mask for implantation has the plurality of alignment marks to be superposed with the alignment mask following variation of the arrangement state respectively, whereby misalignment of the mask position can be prevented also when varying the arrangement state of the exposure mask for implantation.
According to a twenty-first aspect of the present invention, the plurality of alignment marks include a mark indicating in which arrangement state the exposure mask for implantation is used.
In the method of manufacturing a semiconductor device according to the twenty-first aspect, it follows that the alignment marks include arrangement information, whereby it is possible to recognize in which arrangement state the exposure mask for implantation is used.
A method of manufacturing a semiconductor device according to a twenty-second aspect of the present invention comprises a step of (a) forming symmetrical first and second wire patterns in a target layer, the first and second wire patterns have wire parts and contact parts respectively, and the step (a) includes steps of (a-1) preparing an exposure mask for wire formation forming a pattern used in a first or second arrangement state to satisfy the symmetry of the first and second wire patterns for forming a pattern for defining the wire part of the first wire pattern and defining the contact part of the second wire pattern when used in the first arrangement and removing the wire part from the second wire pattern and removing the contact part from the first wire pattern when used in the second arrangement state, (a-2) employing the exposure mask for wire formation in the first arrangement state for removing the target layer corresponding to the wire part in the first wire pattern and removing the target layer corresponding to the contact part in the second wire pattern, (a-3) employing the exposure mask for wire formation in the second arrangement state for removing the target layer corresponding to the contact part in the first wire pattern thereby forming a first etching pattern corresponding to the wire part and the contact part of the first wire pattern and removing the target layer corresponding to the wire part in the second wire pattern thereby forming a second etching pattern corresponding to the wire part and the contact part of the second wire pattern, and (a-4) filling a predetermined conductive material in the first and second etching patterns for forming the first and second wire patterns.
In the method of manufacturing a semiconductor device according to the twenty-second aspect, the first and second wire patterns symmetrically arranged in plan view are formed by varying the arrangement state of a single type of exposure mask for wire formation through the so-called dual damascene method, whereby a plurality of equal wire patterns can be simultaneously obtained for reducing the manufacturing cost.
According to a twenty-third aspect of the present invention, the second arrangement state of the exposure mask for wire formation is rotated by 180xc2x0 with respect to the first arrangement state, and the first and second wire patterns are rotation-symmetrically arranged through the steps (a-2) to (a-4).
In the method of manufacturing a semiconductor device according to the twenty-third aspect, underlayers corresponding to the wire parts and the contact parts in the first and second wire patterns are alternately removed by rotating the exposure mask for wire formation, whereby the number of types of exposure mask for implantations can be reduced for reducing the manufacturing cost.
According to a twenty-fourth aspect of the present invention, the second arrangement state of the exposure mask for wire formation is obtained by turning over the exposure mask for wire formation with respect to the first arrangement state, and the first and second wire patterns are line-symmetrically arranged through the steps (a-2) to (a-4).
In the method of manufacturing a semiconductor device according to the twenty-fourth aspect, underlayers corresponding to the wire parts and the contact parts in the first and second wire patterns are alternately removed by turning over the exposure mask for wire formation, whereby the number of types of exposure mask for implantations can be reduced for reducing the manufacturing cost.
According to a twenty-fifth aspect of the present invention, the method of manufacturing a semiconductor device according to the twenty-second aspect further comprises a step of (b) dividing the first wire pattern and the second wire pattern by dicing after the step (a).
In the method of manufacturing a semiconductor device according to the twenty-fifth aspect, the first wire pattern and the second wire pattern are divided by dicing, whereby a plurality of semiconductor devices having equal wire patterns can be simultaneously obtained.
According to a twenty-sixth aspect of the present invention, an alignment mark for aligning the exposure mask for wire formation is arranged on the target layer, and the exposure mask for wire formation has first and second alignment marks to be superposed with the alignment mark in the first and second arrangement states respectively.
In the method of manufacturing a semiconductor device according to the twenty-sixth aspect, the exposure mask for wire formation has the first and second alignment marks to be superposed with the alignment mark in the first and second arrangement states respectively, whereby misalignment of the mask position can be prevented also when varying the arrangement state of the exposure mask for wire formation.
According to a twenty-seventh aspect of the present invention, the first and second alignment marks include a mark indicating whether the exposure mask for wire formation is used in the first arrangement state or in the second arrangement state.
In the method of manufacturing a semiconductor device according to the twenty-seventh aspect, it follows that the alignment marks include arrangement information, whereby it is possible to recognize whether the exposure mask for wire formation is used in the first arrangement state or in the second arrangement state.
An object of the present invention is to provide a semiconductor device suppressing increase of the number of types of masks for preventing complication of manufacturing steps and suppressing the manufacturing cost, a method of manufacturing the same and an exposure mask for implantation.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.